1406 lines
42 KiB
Plaintext
1406 lines
42 KiB
Plaintext
// Expect retcode = 0
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// IR -> VM 字节码。extern_native 是按函数 ref 下标的 isize 数组：-1 非 extern，
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// >=0 为 native 索引。
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type .{ .Vec } = @import("utils/vec.spl");
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type .{ .ByteView } = @import("utils/byte_view.spl");
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type .{ .ByteBuffer } = @import("utils/byte_buffer.spl");
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type TypeTable = @import("./type_table.spl");
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type LayoutM = @import("./layout.spl");
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type .{ .Layout } = @import("./layout.spl");
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type AttrM = @import("./attr.spl");
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type .{ .Attr, .AttrArg } = @import("./attr.spl");
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type IrM = @import("./ir.spl");
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type .{ .Ir, .IrFunc, .IrEntry, .Global } = @import("./ir.spl");
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type Mcode = @import("./mcode.spl");
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type .{ .Prog, .Op, .VmKind, .VmIns, .VmFunc } = @import("./mcode.spl");
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type Mem = @import("utils/memory.spl");
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type Ir2Vm = @self;
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ir: *Ir,
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ty: *TypeTable,
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attr: *Attr,
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layout: *Layout,
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extern_native: Vec, // isize
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global_gaddr: Vec, // usize：每个全局变量在 prog.gdata 的下标
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prog: Prog,
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fn info_of(ctx: *Ir2Vm, tid: usize): *LayoutM.LayoutInfo {
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ret LayoutM.info_of(ctx.layout, tid);
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}
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fn ir_type_size(ctx: *Ir2Vm, tid: usize): usize {
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var info = info_of(ctx, tid);
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if info == null { ret 0; }
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ret (info.size_bits + 7) / 8;
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}
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fn ir_type_align(ctx: *Ir2Vm, tid: usize): usize {
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var info = info_of(ctx, tid);
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if info == null { ret 1; }
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var a = info.align_bits / 8;
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if a == 0 { a = 1; }
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ret a;
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}
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fn ir_is_aggregate(ctx: *Ir2Vm, tid: usize): bool {
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var te = TypeTable.node(ctx.ty, tid);
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if te == null { ret false; }
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match te.node {
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.Array => { ret true; },
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.Struct => { ret true; },
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.Union => { ret true; },
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.Enum => { ret true; },
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.Shape => { ret true; },
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_ => { ret false; },
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}
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ret false;
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}
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fn fn_ret_type(ctx: *Ir2Vm, fn_tid: usize): usize {
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var te = TypeTable.node(ctx.ty, fn_tid);
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if te == null { ret 0; }
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match te.node {
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.Fn(f) => { ret f.ret_type; },
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_ => { ret 0; },
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}
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ret 0;
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}
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fn fn_nargs(ctx: *Ir2Vm, fn_tid: usize): usize {
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var te = TypeTable.node(ctx.ty, fn_tid);
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if te == null { ret 0; }
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match te.node {
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.Fn(f) => { ret f.params.len; },
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_ => { ret 0; },
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}
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ret 0;
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}
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fn ir_agg_field_tid(ctx: *Ir2Vm, tid: usize, idx: usize): usize {
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var te = TypeTable.node(ctx.ty, tid);
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if te == null { ret 0; }
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match te.node {
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.Enum(agg) => {
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if idx == 0 { ret agg.tag_type; }
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var vidx = idx - 1;
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if vidx < agg.variants.len {
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var m = TypeTable.member_at(&agg.variants, vidx);
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if m != null { ret m.type_id; }
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}
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ret 0;
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},
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.Struct(agg) => {
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if idx < agg.variants.len {
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var m = TypeTable.member_at(&agg.variants, idx);
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if m != null { ret m.type_id; }
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}
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ret 0;
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},
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.Union(agg) => {
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if idx < agg.variants.len {
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var m = TypeTable.member_at(&agg.variants, idx);
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if m != null { ret m.type_id; }
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}
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ret 0;
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},
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.Array(a) => { ret a.element; },
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_ => { ret 0; },
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}
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ret 0;
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}
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fn ir_agg_field_off(ctx: *Ir2Vm, tid: usize, idx: usize): usize {
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var te = TypeTable.node(ctx.ty, tid);
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if te == null { ret 0; }
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match te.node {
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.Array(a) => { ret idx * ir_type_size(ctx, a.element); },
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_ => {},
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}
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var info = info_of(ctx, tid);
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if info == null || idx >= info.field_bit_offsets.len { ret 0; }
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ret usize_at(&info.field_bit_offsets, idx) / 8;
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}
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fn vm_kind_of(ctx: *Ir2Vm, tid: usize): VmKind {
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var te = TypeTable.node(ctx.ty, tid);
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if te == null { ret .Void; }
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match te.node {
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.Unit => { ret .Void; },
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.Bool => { ret .Bool; },
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.Int(x) => {
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if x.bits == 0 { ret .I32; }
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if x.bits == 8 { if x.is_signed { ret .I8; } ret .U8; }
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if x.bits == 16 { if x.is_signed { ret .I16; } ret .U16; }
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if x.bits == 32 { if x.is_signed { ret .I32; } ret .U32; }
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if x.is_signed { ret .I64; }
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ret .U64;
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},
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.Float(x) => { if x.bits == 32 { ret .F32; } ret .F64; },
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_ => { ret .Ptr; },
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}
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ret .Ptr;
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}
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fn tid_is_signed(ctx: *Ir2Vm, tid: usize): bool {
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var te = TypeTable.node(ctx.ty, tid);
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if te == null { ret false; }
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match te.node {
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.Int(x) => { ret x.is_signed; },
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_ => { ret false; },
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}
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ret false;
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}
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// 节点的「值类型」；0 表示无结果（控制/存储类）。
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fn ir_result_tid(ctx: *Ir2Vm, n: *IrEntry): usize {
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match n.body {
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.Arith(a) => { ret a.tid; },
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.Cmp(c) => { ret c.tid; },
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.Cast(c) => { ret c.to_tid; },
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.MemAlloc(m) => { ret TypeTable.make_ptr(ctx.ty, m.tid); },
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.MemGlobalAlloc(m) => { ret m.tid; },
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.MemLoad(m) => { ret m.tid; },
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.MemOffset(m) => { ret TypeTable.make_ptr(ctx.ty, m.tid); },
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.MemFieldPtr(m) => {
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var field = ir_agg_field_tid(ctx, m.tid, m.field_idx);
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ret TypeTable.make_ptr(ctx.ty, field);
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},
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.Const(c) => { ret c.tid; },
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.TypeOp(t) => { ret t.tid; },
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.AggConstruct(a) => { ret a.tid; },
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.AggExtract(a) => { ret a.field_tid; },
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.AggInsert(a) => { ret a.tid; },
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.Select(s) => { ret s.tid; },
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.Call(c) => { ret c.tid; },
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.Param(p) => { ret p.tid; },
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_ => { ret 0; },
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}
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ret 0;
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}
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// 内部热路径：假定索引有效，直接取址（省去 Vec.get/valid）。
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fn usize_at(v: *Vec, i: usize): usize {
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ret (v.data as *usize)[i];
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}
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fn push_usize(v: *Vec, x: usize) {
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Vec.push_raw(v, &x as *u8);
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}
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fn fnode(f: *IrFunc, i: usize): *IrEntry {
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ret (f.nodes.data as *IrEntry) + i;
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}
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fn align_up(x: usize, a: usize): usize {
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if a <= 1 { ret x; }
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ret (x + a - 1) / a * a;
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}
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fn const_usize(n: *IrEntry): usize {
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if n == null { ret 0; }
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match n.body {
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.Const(c) => {
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match c.lit {
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.Int(v) => { ret v; },
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.Char(v) => { ret v as usize; },
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.Bool(v) => { if v { ret 1; } ret 0; },
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.Ptr(v) => { ret v; },
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.Fn(v) => { ret v; },
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.Float(v) => { ret 0; },
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}
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},
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_ => { ret 0; },
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}
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ret 0;
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}
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fn const_fn(n: *IrEntry): usize {
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if n == null { ret 0; }
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match n.body {
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.Const(c) => {
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match c.lit {
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.Fn(v) => { ret v; },
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_ => { ret 0; },
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}
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},
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_ => { ret 0; },
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}
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ret 0;
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}
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fn fn_check_extern(ctx: *Ir2Vm, f: *IrFunc): bool {
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if ctx.attr == null || f == null { ret false; }
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var i: usize = 0;
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while i < f.attrs.len {
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var a = AttrM.node(ctx.attr, usize_at(&f.attrs, i));
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if a != null {
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var info = AttrM.info_at(ctx.attr, a.info_index);
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if info != null && ByteView.eq(info.name, ByteView.from_slice("extern")) {
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a.consumed_mask = a.consumed_mask | (1 as u32 << 2);
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ret true;
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}
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}
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i = i + 1;
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}
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ret false;
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}
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fn extern_get(ctx: *Ir2Vm, ref: usize): isize {
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if ref == 0 || ref >= ctx.extern_native.len { ret -1; }
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match Vec.get(&ctx.extern_native, ref) {
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.Ok(ptr) => { ret (ptr as *isize).*; },
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.Err(error) => { ret -1; },
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}
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ret -1;
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}
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fn extern_set(ctx: *Ir2Vm, ref: usize, value: isize) {
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if ref >= ctx.extern_native.len { ret; }
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match Vec.get(&ctx.extern_native, ref) {
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.Ok(ptr) => { (ptr as *isize).* = value; },
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.Err(error) => {},
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}
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}
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type Slot = struct {
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result_off: usize,
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data_off: usize,
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}
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type FrameLayout = struct {
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slots: Vec, // Slot
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args_bytes: usize,
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frame_bytes: usize,
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}
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fn slot_at(frame: *FrameLayout, i: usize): *Slot {
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ret (frame.slots.data as *Slot) + i;
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}
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fn slot_result(frame: *FrameLayout, i: usize): usize {
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var s = slot_at(frame, i);
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if s == null { ret 0; }
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ret s.result_off;
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}
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fn slot_data(frame: *FrameLayout, i: usize): usize {
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var s = slot_at(frame, i);
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if s == null { ret 0; }
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ret s.data_off;
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}
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fn node_data_size(ctx: *Ir2Vm, f: *IrFunc, node: *IrEntry): usize {
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match node.body {
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.MemAlloc(m) => {
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var count: usize = 1;
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if m.count < f.nodes.len {
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var cn = fnode(f, m.count);
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count = const_usize(cn);
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}
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if count == 0 { count = 1; }
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var sz = ir_type_size(ctx, m.tid);
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if sz == 0 { sz = 1; }
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ret sz * count;
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},
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.AggConstruct(a) => {
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var sz = ir_type_size(ctx, a.tid);
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if sz == 0 { ret 8; }
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ret sz;
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},
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.AggInsert(a) => {
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var sz = ir_type_size(ctx, a.tid);
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if sz == 0 { ret 8; }
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ret sz;
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},
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.AggExtract(a) => {
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if ir_is_aggregate(ctx, a.field_tid) { ret ir_type_size(ctx, a.field_tid); }
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ret 0;
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},
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.MemLoad(m) => {
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if ir_is_aggregate(ctx, m.tid) { ret ir_type_size(ctx, m.tid); }
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ret 0;
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},
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.Panic(p) => { ret @sizeof(usize) * 4; },
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.Call(c) => {
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if ir_is_aggregate(ctx, c.tid) { ret ir_type_size(ctx, c.tid); }
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ret 0;
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},
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_ => { ret 0; },
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}
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ret 0;
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}
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fn frame_build(fl: *FrameLayout, ctx: *Ir2Vm, fid: usize) {
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fl.args_bytes = 0;
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fl.frame_bytes = 0;
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var f = IrM.func(ctx.ir, fid);
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if f == null {
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fl.slots = Vec.blank(@sizeof(Slot), @alignof(Slot));
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ret;
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}
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var n = f.nodes.len;
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match Vec.with_capacity(@sizeof(Slot), @alignof(Slot), n) {
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.Ok(v) => { fl.slots = v; },
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.Err(error) => { fl.slots = Vec.blank(@sizeof(Slot), @alignof(Slot)); },
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}
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var i: usize = 0;
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while i < n {
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var blank: Slot = .{ .result_off = 0, .data_off = 0 };
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Vec.push_raw(&fl.slots, &blank as *u8);
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i = i + 1;
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}
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var nargs = fn_nargs(ctx, f.fn_tid);
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var hidden_sret: usize = 0;
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if ir_is_aggregate(ctx, fn_ret_type(ctx, f.fn_tid)) { hidden_sret = 1; }
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fl.args_bytes = (nargs + hidden_sret) * @sizeof(usize);
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var off = fl.args_bytes;
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i = 1;
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while i < n {
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var node = fnode(f, i);
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if ir_result_tid(ctx, node) != 0 {
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var s = slot_at(fl, i);
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s.result_off = off;
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off = off + @sizeof(usize);
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}
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var extra = node_data_size(ctx, f, node);
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if extra != 0 {
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off = align_up(off, 8);
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var s2 = slot_at(fl, i);
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s2.data_off = off;
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off = off + align_up(extra, 8);
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}
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i = i + 1;
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}
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fl.frame_bytes = align_up(off, 8);
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}
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fn frame_drop(fl: *FrameLayout) {
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Vec.drop(&fl.slots);
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}
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type FixKind = enum {
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Jmp,
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Fnaddr,
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}
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type Fix = struct {
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kind: FixKind,
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ins_idx: usize,
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node_target: usize,
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fn_target: usize,
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}
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type Cgen = @self;
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ctx: *Ir2Vm,
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fid: usize,
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irf: *IrFunc,
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frame: FrameLayout,
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node_ip: Vec, // usize
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fixups: *Vec,
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terminated: bool,
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fn emit(cg: *Cgen, op: Op, ty: VmKind, imm: usize) {
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var prog = &cg.ctx.prog;
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var i = prog.insns.len;
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if i < prog.insns.cap {
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var p = (prog.insns.data as *VmIns) + i;
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p.opcode = op;
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p.ty = ty;
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p.imm = imm;
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prog.insns.len = i + 1;
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ret;
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}
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Mcode.add_instr(prog, op, ty, imm);
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}
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fn ip_of(cg: *Cgen): usize {
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ret cg.ctx.prog.insns.len;
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}
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fn ins_ptr(prog: *Prog, i: usize): *VmIns {
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ret (prog.insns.data as *VmIns) + i;
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}
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fn func_ptr(prog: *Prog, i: usize): *VmFunc {
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ret (prog.funcs.data as *VmFunc) + i;
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}
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fn cg_laddr(cg: *Cgen, off: usize) { emit(cg, .Laddr, .Void, off); }
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fn cg_load(cg: *Cgen, k: VmKind) { emit(cg, .Load, k, 0); }
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fn cg_store(cg: *Cgen, k: VmKind) { emit(cg, .Store, k, 0); }
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fn cg_push(cg: *Cgen, k: VmKind, v: usize) { emit(cg, .Push, k, v); }
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fn cg_op(cg: *Cgen, op: Op, k: VmKind) { emit(cg, op, k, 0); }
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fn cg_swap(cg: *Cgen) { emit(cg, .Swap, .Void, 0); }
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fn cg_gaddr(cg: *Cgen, idx: usize) { emit(cg, .Gaddr, .Void, idx); }
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fn cg_load_slot(cg: *Cgen, ref: usize, k: VmKind) {
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emit(cg, .Laddr, .Void, slot_result(&cg.frame, ref));
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emit(cg, .Load, k, 0);
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}
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fn cg_store_slot(cg: *Cgen, ref: usize, k: VmKind) {
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emit(cg, .Laddr, .Void, slot_result(&cg.frame, ref));
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emit(cg, .Swap, .Void, 0);
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emit(cg, .Store, k, 0);
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}
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fn cg_store_at(cg: *Cgen, addr: usize, k: VmKind) {
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emit(cg, .Laddr, .Void, addr);
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emit(cg, .Swap, .Void, 0);
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emit(cg, .Store, k, 0);
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}
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type DataLoc = struct {
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indirect: bool,
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off: usize,
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base: usize,
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}
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fn direct_data(off: usize): DataLoc {
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ret DataLoc { .indirect = false, .off = off, .base = 0 };
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}
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fn direct_data_base(off: usize, base: usize): DataLoc {
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ret DataLoc { .indirect = false, .off = off, .base = base };
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}
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|
||
fn ptr_slot(slot_off: usize): DataLoc {
|
||
ret DataLoc { .indirect = true, .off = slot_off, .base = 0 };
|
||
}
|
||
|
||
fn ptr_slot_base(slot_off: usize, base: usize): DataLoc {
|
||
ret DataLoc { .indirect = true, .off = slot_off, .base = base };
|
||
}
|
||
|
||
fn cg_push_addr(cg: *Cgen, loc: DataLoc, extra: usize) {
|
||
var delta = loc.base + extra;
|
||
if loc.indirect {
|
||
cg_laddr(cg, loc.off);
|
||
cg_load(cg, .Ptr);
|
||
if delta != 0 {
|
||
cg_push(cg, .U64, delta);
|
||
cg_op(cg, .Add, .Ptr);
|
||
}
|
||
} else {
|
||
cg_laddr(cg, loc.off + delta);
|
||
}
|
||
}
|
||
|
||
fn cg_copy_agg(cg: *Cgen, src: DataLoc, dst: DataLoc, tid: usize) {
|
||
var sz = ir_type_size(cg.ctx, tid);
|
||
var done: usize = 0;
|
||
while sz - done >= 8 {
|
||
cg_push_addr(cg, dst, done);
|
||
cg_push_addr(cg, src, done);
|
||
cg_load(cg, .U64);
|
||
cg_store(cg, .U64);
|
||
done = done + 8;
|
||
}
|
||
while done < sz {
|
||
cg_push_addr(cg, dst, done);
|
||
cg_push_addr(cg, src, done);
|
||
cg_load(cg, .U8);
|
||
cg_store(cg, .U8);
|
||
done = done + 1;
|
||
}
|
||
}
|
||
|
||
fn cg_add_fix(cg: *Cgen, ins_idx: usize, kind: FixKind, node_target: usize, fn_target: usize) {
|
||
var fx = Fix {
|
||
.kind = kind,
|
||
.ins_idx = ins_idx,
|
||
.node_target = node_target,
|
||
.fn_target = fn_target,
|
||
};
|
||
Vec.push(cg.fixups, &fx as *u8);
|
||
}
|
||
|
||
fn arith_tid(n: *IrEntry): usize {
|
||
match n.body {
|
||
.Arith(a) => { ret a.tid; },
|
||
_ => { ret 0; },
|
||
}
|
||
ret 0;
|
||
}
|
||
|
||
fn cg_binop(cg: *Cgen, ref: usize, n: *IrEntry, op: Op) {
|
||
match n.body {
|
||
.Arith(a) => {
|
||
var k = vm_kind_of(cg.ctx, a.tid);
|
||
cg_load_slot(cg, a.left, k);
|
||
cg_load_slot(cg, a.right, k);
|
||
cg_op(cg, op, k);
|
||
cg_store_slot(cg, ref, k);
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_unop(cg: *Cgen, ref: usize, n: *IrEntry, op: Op) {
|
||
match n.body {
|
||
.Arith(a) => {
|
||
var k = vm_kind_of(cg.ctx, a.tid);
|
||
cg_load_slot(cg, a.left, k);
|
||
cg_op(cg, op, k);
|
||
cg_store_slot(cg, ref, k);
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_cmp(cg: *Cgen, ref: usize, n: *IrEntry, op: Op) {
|
||
match n.body {
|
||
.Cmp(c) => {
|
||
var k = vm_kind_of(cg.ctx, c.tid);
|
||
cg_load_slot(cg, c.a, k);
|
||
cg_load_slot(cg, c.b, k);
|
||
cg_op(cg, op, k);
|
||
cg_store_slot(cg, ref, .Bool);
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_const(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
var tid: usize = 0;
|
||
match n.body { .Const(c) => { tid = c.tid; }, _ => { ret; } }
|
||
var te = TypeTable.node(ctx.ty, tid);
|
||
if te == null { ret; }
|
||
|
||
// 全局变量引用：Const{ lit = Global(gidx) } → GADDR（该全局的运行时地址）。
|
||
match n.body {
|
||
.Const(c) => {
|
||
match c.lit {
|
||
.Global(g) => {
|
||
var di: usize = 0;
|
||
if g < ctx.global_gaddr.len { di = (ctx.global_gaddr.data as *usize)[g]; }
|
||
emit(cg, .Gaddr, .Void, di);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
ret;
|
||
},
|
||
_ => {},
|
||
}
|
||
},
|
||
_ => {},
|
||
}
|
||
|
||
match te.node {
|
||
.Fn(f) => {
|
||
var cref = const_fn(n);
|
||
var nat_idx: isize = -1;
|
||
if cref > 0 { nat_idx = extern_get(ctx, cref); }
|
||
if nat_idx >= 0 {
|
||
cg_push(cg, .U64, nat_idx as usize);
|
||
} else {
|
||
var idx = ip_of(cg);
|
||
cg_push(cg, .Ptr, 0);
|
||
cg_add_fix(cg, idx, .Fnaddr, 0, cref);
|
||
}
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
ret;
|
||
},
|
||
.Unit => { ret; },
|
||
_ => {},
|
||
}
|
||
|
||
var k = vm_kind_of(ctx, tid);
|
||
var imm: usize = 0;
|
||
match te.node {
|
||
.Bool => {
|
||
match n.body {
|
||
.Const(c) => {
|
||
match c.lit { .Bool(v) => { if v { imm = 1; } }, _ => {} }
|
||
},
|
||
_ => {},
|
||
}
|
||
},
|
||
.Int(x) => { imm = const_usize(n); },
|
||
.Any => { imm = const_usize(n); },
|
||
.Float => {
|
||
var fv: f64 = 0.0;
|
||
match n.body {
|
||
.Const(c) => {
|
||
match c.lit { .Float(v) => { fv = v; }, _ => {} }
|
||
},
|
||
_ => {},
|
||
}
|
||
Mem.copy(&imm as *any, &fv as *any, 8);
|
||
},
|
||
.Ptr => { imm = const_usize(n); },
|
||
_ => {},
|
||
}
|
||
cg_push(cg, k, imm);
|
||
cg_store_slot(cg, ref, k);
|
||
}
|
||
|
||
fn cg_cast(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
match n.body {
|
||
.Cast(c) => {
|
||
var ft = TypeTable.node(ctx.ty, c.from_tid);
|
||
var tt = TypeTable.node(ctx.ty, c.to_tid);
|
||
if ft == null || tt == null { ret; }
|
||
|
||
var fk = vm_kind_of(ctx, c.from_tid);
|
||
var tk = vm_kind_of(ctx, c.to_tid);
|
||
cg_load_slot(cg, c.val, fk);
|
||
|
||
var f_int = false;
|
||
var f_bits: usize = 0;
|
||
var f_signed = false;
|
||
match ft.node {
|
||
.Int(x) => { f_int = true; f_bits = x.bits; f_signed = x.is_signed; },
|
||
_ => {},
|
||
}
|
||
var t_int = false;
|
||
var t_bits: usize = 0;
|
||
match tt.node {
|
||
.Int(x) => { t_int = true; t_bits = x.bits; },
|
||
_ => {},
|
||
}
|
||
var t_bool = false;
|
||
match tt.node { .Bool => { t_bool = true; }, _ => {} }
|
||
var f_bool = false;
|
||
match ft.node { .Bool => { f_bool = true; }, _ => {} }
|
||
|
||
if f_int && t_int {
|
||
if f_bits > t_bits {
|
||
emit(cg, .Trunc, .Void, t_bits);
|
||
} else if f_bits < t_bits {
|
||
if f_signed { emit(cg, .Sext, .Void, f_bits); }
|
||
else { emit(cg, .Zext, .Void, f_bits); }
|
||
}
|
||
} else if f_bool && t_int {
|
||
emit(cg, .Zext, .Void, 1);
|
||
}
|
||
t_bool;
|
||
cg_store_slot(cg, ref, tk);
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_mem(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
match n.body {
|
||
.MemAlloc(m) => {
|
||
cg_laddr(cg, slot_data(&cg.frame, ref));
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
},
|
||
.MemGlobalAlloc(m) => {
|
||
var idx: usize = 0;
|
||
if m.const_node < cg.irf.nodes.len {
|
||
var cn = fnode(cg.irf, m.const_node);
|
||
var pv: usize = 0;
|
||
var ctid: usize = 0;
|
||
match cn.body {
|
||
.Const(c) => {
|
||
ctid = c.tid;
|
||
match c.lit { .Ptr(v) => { pv = v; }, _ => {} }
|
||
},
|
||
_ => {},
|
||
}
|
||
if pv != 0 {
|
||
var size = ir_type_size(ctx, ctid);
|
||
idx = Mcode.add_data(&ctx.prog, pv, size);
|
||
}
|
||
}
|
||
if idx > 0 { emit(cg, .Gaddr, .Void, idx); }
|
||
else { cg_push(cg, .Ptr, 0); }
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
},
|
||
.MemLoad(m) => {
|
||
var tid = m.tid;
|
||
if ir_is_aggregate(ctx, tid) {
|
||
var data = slot_data(&cg.frame, ref);
|
||
cg_copy_agg(cg, ptr_slot(slot_result(&cg.frame, m.ptr)), direct_data(data), tid);
|
||
cg_laddr(cg, data);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
} else {
|
||
var k = vm_kind_of(ctx, tid);
|
||
cg_load_slot(cg, m.ptr, .Ptr);
|
||
cg_load(cg, k);
|
||
cg_store_slot(cg, ref, k);
|
||
}
|
||
},
|
||
.MemStore(m) => {
|
||
var tid = m.tid;
|
||
if ir_is_aggregate(ctx, tid) {
|
||
cg_copy_agg(cg, ptr_slot(slot_result(&cg.frame, m.val)),
|
||
ptr_slot(slot_result(&cg.frame, m.ptr)), tid);
|
||
} else {
|
||
var k = vm_kind_of(ctx, tid);
|
||
cg_load_slot(cg, m.ptr, .Ptr);
|
||
cg_load_slot(cg, m.val, k);
|
||
cg_store(cg, k);
|
||
}
|
||
},
|
||
.MemOffset(m) => {
|
||
var elem_size = ir_type_size(ctx, m.tid);
|
||
if elem_size == 0 { elem_size = 1; }
|
||
cg_load_slot(cg, m.ptr, .Ptr);
|
||
cg_load_slot(cg, m.offset, .U64);
|
||
cg_push(cg, .U64, elem_size);
|
||
cg_op(cg, .Mul, .U64);
|
||
cg_op(cg, .Add, .Ptr);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
},
|
||
.MemFieldPtr(m) => {
|
||
var off = ir_agg_field_off(ctx, m.tid, m.field_idx);
|
||
cg_load_slot(cg, m.agg, .Ptr);
|
||
if off != 0 {
|
||
cg_push(cg, .U64, off);
|
||
cg_op(cg, .Add, .Ptr);
|
||
}
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_agg(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
match n.body {
|
||
.AggConstruct(a) => {
|
||
var base = slot_data(&cg.frame, ref);
|
||
var agg_t = a.tid;
|
||
var i: usize = 0;
|
||
while i < a.fields.len {
|
||
var fref = usize_at(&a.fields, i);
|
||
var ftid = ir_agg_field_tid(ctx, agg_t, i);
|
||
if ftid != 0 {
|
||
var foff = ir_agg_field_off(ctx, agg_t, i);
|
||
if ir_is_aggregate(ctx, ftid) {
|
||
cg_copy_agg(cg, ptr_slot(slot_result(&cg.frame, fref)),
|
||
direct_data_base(base, foff), ftid);
|
||
} else {
|
||
var fk = vm_kind_of(ctx, ftid);
|
||
cg_load_slot(cg, fref, fk);
|
||
cg_store_at(cg, base + foff, fk);
|
||
}
|
||
}
|
||
i = i + 1;
|
||
}
|
||
cg_laddr(cg, base);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
},
|
||
.AggExtract(a) => {
|
||
var agg_t = a.tid;
|
||
var ftid = a.field_tid;
|
||
var foff = ir_agg_field_off(ctx, agg_t, a.field_idx);
|
||
if ir_is_aggregate(ctx, ftid) {
|
||
var data = slot_data(&cg.frame, ref);
|
||
cg_copy_agg(cg, ptr_slot_base(slot_result(&cg.frame, a.val), foff),
|
||
direct_data(data), ftid);
|
||
cg_laddr(cg, data);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
} else {
|
||
var fk = vm_kind_of(ctx, ftid);
|
||
cg_load_slot(cg, a.val, .Ptr);
|
||
if foff != 0 {
|
||
cg_push(cg, .U64, foff);
|
||
cg_op(cg, .Add, .Ptr);
|
||
}
|
||
cg_load(cg, fk);
|
||
cg_store_slot(cg, ref, fk);
|
||
}
|
||
},
|
||
.AggInsert(a) => {
|
||
var base = slot_data(&cg.frame, ref);
|
||
var agg_t = a.tid;
|
||
cg_copy_agg(cg, ptr_slot(slot_result(&cg.frame, a.agg)), direct_data(base), agg_t);
|
||
|
||
var foff = ir_agg_field_off(ctx, agg_t, a.field_idx);
|
||
var ftid = ir_agg_field_tid(ctx, agg_t, a.field_idx);
|
||
if ftid != 0 {
|
||
if ir_is_aggregate(ctx, ftid) {
|
||
cg_copy_agg(cg, ptr_slot(slot_result(&cg.frame, a.field)),
|
||
direct_data_base(base, foff), ftid);
|
||
} else {
|
||
var fk = vm_kind_of(ctx, ftid);
|
||
cg_load_slot(cg, a.field, fk);
|
||
cg_store_at(cg, base + foff, fk);
|
||
}
|
||
}
|
||
cg_laddr(cg, base);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_typeop(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
var v: usize = 0;
|
||
match n.body {
|
||
.TypeOp(t) => {
|
||
match n.kind {
|
||
.TypeSizeof => { v = ir_type_size(ctx, t.tid); },
|
||
.TypeBitsizeof => {
|
||
var info = info_of(ctx, t.tid);
|
||
if info != null { v = info.size_bits; }
|
||
},
|
||
.TypeAlignof => { v = ir_type_align(ctx, t.tid); },
|
||
.TypeOffsetof => {
|
||
var idx: usize = 0;
|
||
if t.field_idx < cg.irf.nodes.len {
|
||
idx = const_usize(fnode(cg.irf, t.field_idx));
|
||
}
|
||
v = ir_agg_field_off(ctx, t.tid, idx);
|
||
},
|
||
.TypeFieldCount => {
|
||
var te = TypeTable.node(ctx.ty, t.tid);
|
||
if te != null {
|
||
match te.node {
|
||
.Struct(agg) => { v = agg.variants.len; },
|
||
.Union(agg) => { v = agg.variants.len; },
|
||
.Enum(agg) => { v = agg.variants.len; },
|
||
.Shape(agg) => { v = agg.variants.len; },
|
||
_ => {},
|
||
}
|
||
}
|
||
},
|
||
_ => { ret; },
|
||
}
|
||
},
|
||
_ => { ret; },
|
||
}
|
||
cg_push(cg, .U64, v);
|
||
cg_store_slot(cg, ref, .U64);
|
||
}
|
||
|
||
fn cg_control(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
match n.body {
|
||
.Param(p) => {
|
||
var k = vm_kind_of(ctx, p.tid);
|
||
var idx: usize = 0;
|
||
if p.idx < cg.irf.nodes.len {
|
||
idx = const_usize(fnode(cg.irf, p.idx));
|
||
}
|
||
var shift: usize = 0;
|
||
if ir_is_aggregate(ctx, fn_ret_type(ctx, cg.irf.fn_tid)) { shift = 1; }
|
||
cg_laddr(cg, (idx + shift) * @sizeof(usize));
|
||
cg_load(cg, k);
|
||
cg_store_slot(cg, ref, k);
|
||
},
|
||
.Ret(r) => {
|
||
var ret_tid = r.tid;
|
||
if ir_is_aggregate(ctx, ret_tid) {
|
||
if r.val != 0 {
|
||
var sz = ir_type_size(ctx, ret_tid);
|
||
cg_laddr(cg, 0);
|
||
cg_load(cg, .Ptr);
|
||
cg_load_slot(cg, r.val, .Ptr);
|
||
cg_push(cg, .U64, sz);
|
||
emit(cg, .Memcpy, .Void, 0);
|
||
}
|
||
emit(cg, .Ret, .Void, 0);
|
||
} else {
|
||
var k = vm_kind_of(ctx, ret_tid);
|
||
if @enum2int(k) != @enum2int(VmKind.Void) && r.val != 0 {
|
||
cg_load_slot(cg, r.val, k);
|
||
}
|
||
emit(cg, .Ret, k, 0);
|
||
}
|
||
},
|
||
.Br(b) => {
|
||
cg_load_slot(cg, b.cond, .Bool);
|
||
var bz_idx = ip_of(cg);
|
||
emit(cg, .Bz, .Void, 0);
|
||
cg_add_fix(cg, bz_idx, .Jmp, b.false_label, 0);
|
||
var jmp_idx = ip_of(cg);
|
||
emit(cg, .Jmp, .Void, 0);
|
||
cg_add_fix(cg, jmp_idx, .Jmp, b.true_label, 0);
|
||
},
|
||
.Jmp(j) => {
|
||
var idx = ip_of(cg);
|
||
emit(cg, .Jmp, .Void, 0);
|
||
cg_add_fix(cg, idx, .Jmp, j.label, 0);
|
||
},
|
||
.Call(cl) => {
|
||
var callee: usize = 0;
|
||
if cl.func < cg.irf.nodes.len {
|
||
callee = const_fn(fnode(cg.irf, cl.func));
|
||
}
|
||
var nat_idx: isize = -1;
|
||
if callee > 0 { nat_idx = extern_get(ctx, callee); }
|
||
var nargs = cl.params.len;
|
||
|
||
if nat_idx >= 0 {
|
||
var i: usize = 0;
|
||
while i < nargs {
|
||
var pref = usize_at(&cl.params, i);
|
||
var pn = fnode(cg.irf, pref);
|
||
var pk = vm_kind_of(ctx, ir_result_tid(ctx, pn));
|
||
cg_load_slot(cg, pref, pk);
|
||
i = i + 1;
|
||
}
|
||
cg_push(cg, .U64, nat_idx as usize);
|
||
emit(cg, .Ncall, .Void, nargs);
|
||
var rk = vm_kind_of(ctx, cl.tid);
|
||
if @enum2int(rk) == @enum2int(VmKind.Void) {
|
||
emit(cg, .Drop, .Void, 0);
|
||
} else {
|
||
cg_store_slot(cg, ref, rk);
|
||
}
|
||
} else {
|
||
/* ABI：实参下方预留 2 个空闲 slot（PAD0/PAD1）。 */
|
||
cg_push(cg, .U64, 0);
|
||
cg_push(cg, .U64, 0);
|
||
var ret_t = cl.tid;
|
||
var ret_is_sret = ir_is_aggregate(ctx, ret_t);
|
||
var sret_off: usize = 0;
|
||
if ret_is_sret {
|
||
sret_off = slot_data(&cg.frame, ref);
|
||
cg_laddr(cg, sret_off);
|
||
}
|
||
var i: usize = 0;
|
||
while i < nargs {
|
||
var pref = usize_at(&cl.params, i);
|
||
var pn = fnode(cg.irf, pref);
|
||
var pk = vm_kind_of(ctx, ir_result_tid(ctx, pn));
|
||
cg_load_slot(cg, pref, pk);
|
||
i = i + 1;
|
||
}
|
||
cg_load_slot(cg, cl.func, .Ptr);
|
||
var actual = nargs;
|
||
if ret_is_sret { actual = actual + 1; }
|
||
emit(cg, .Call, .Void, actual);
|
||
|
||
if ret_is_sret {
|
||
cg_laddr(cg, sret_off);
|
||
cg_store_slot(cg, ref, .Ptr);
|
||
} else {
|
||
var rk = vm_kind_of(ctx, ret_t);
|
||
if @enum2int(rk) != @enum2int(VmKind.Void) {
|
||
cg_store_slot(cg, ref, rk);
|
||
}
|
||
}
|
||
}
|
||
},
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cg_node(cg: *Cgen, ref: usize, n: *IrEntry) {
|
||
var ctx = cg.ctx;
|
||
match n.kind {
|
||
.TypeConst => { cg_const(cg, ref, n); },
|
||
|
||
.ArithAdd => { cg_binop(cg, ref, n, .Add); },
|
||
.ArithSub => { cg_binop(cg, ref, n, .Sub); },
|
||
.ArithMul => { cg_binop(cg, ref, n, .Mul); },
|
||
.ArithDiv => {
|
||
if tid_is_signed(ctx, arith_tid(n)) { cg_binop(cg, ref, n, .DivS); }
|
||
else { cg_binop(cg, ref, n, .DivU); }
|
||
},
|
||
.ArithRem => {
|
||
if tid_is_signed(ctx, arith_tid(n)) { cg_binop(cg, ref, n, .RemS); }
|
||
else { cg_binop(cg, ref, n, .RemU); }
|
||
},
|
||
.ArithAnd => { cg_binop(cg, ref, n, .And); },
|
||
.ArithOr => { cg_binop(cg, ref, n, .Or); },
|
||
.ArithXor => { cg_binop(cg, ref, n, .Xor); },
|
||
.ArithShl => { cg_binop(cg, ref, n, .Shl); },
|
||
.ArithShr => {
|
||
if tid_is_signed(ctx, arith_tid(n)) { cg_binop(cg, ref, n, .ShrS); }
|
||
else { cg_binop(cg, ref, n, .ShrU); }
|
||
},
|
||
.ArithNeg => { cg_unop(cg, ref, n, .Neg); },
|
||
.ArithNot => {
|
||
var tid = arith_tid(n);
|
||
var te = TypeTable.node(ctx.ty, tid);
|
||
var is_bool = false;
|
||
if te != null {
|
||
match te.node { .Bool => { is_bool = true; }, _ => {} }
|
||
}
|
||
if is_bool {
|
||
match n.body { .Arith(a) => {
|
||
cg_load_slot(cg, a.left, .Bool);
|
||
}, _ => {} }
|
||
cg_push(cg, .Bool, 0);
|
||
cg_op(cg, .Eq, .Bool);
|
||
cg_store_slot(cg, ref, .Bool);
|
||
} else {
|
||
cg_unop(cg, ref, n, .Not);
|
||
}
|
||
},
|
||
.ArithAbs => {},
|
||
|
||
.CmpEq => { cg_cmp(cg, ref, n, .Eq); },
|
||
.CmpNe => { cg_cmp(cg, ref, n, .Ne); },
|
||
.CmpLt => {
|
||
var k = cmp_tid(n);
|
||
if tid_is_signed(ctx, k) { cg_cmp(cg, ref, n, .Slt); } else { cg_cmp(cg, ref, n, .Ult); }
|
||
},
|
||
.CmpLe => {
|
||
var k = cmp_tid(n);
|
||
if tid_is_signed(ctx, k) { cg_cmp(cg, ref, n, .Sle); } else { cg_cmp(cg, ref, n, .Ule); }
|
||
},
|
||
.CmpGt => {
|
||
var k = cmp_tid(n);
|
||
if tid_is_signed(ctx, k) { cg_cmp(cg, ref, n, .Sgt); } else { cg_cmp(cg, ref, n, .Ugt); }
|
||
},
|
||
.CmpGe => {
|
||
var k = cmp_tid(n);
|
||
if tid_is_signed(ctx, k) { cg_cmp(cg, ref, n, .Sge); } else { cg_cmp(cg, ref, n, .Uge); }
|
||
},
|
||
|
||
.CastTrunc => { cg_cast(cg, ref, n); },
|
||
.CastZext => { cg_cast(cg, ref, n); },
|
||
.CastSext => { cg_cast(cg, ref, n); },
|
||
.CastFext => { cg_cast(cg, ref, n); },
|
||
.CastFtrunc => { cg_cast(cg, ref, n); },
|
||
.CastBitcast => { cg_cast(cg, ref, n); },
|
||
.CastPtr2int => { cg_cast(cg, ref, n); },
|
||
.CastInt2ptr => { cg_cast(cg, ref, n); },
|
||
.CastBool2int => { cg_cast(cg, ref, n); },
|
||
.CaseInt2float => { cg_cast(cg, ref, n); },
|
||
.CaseFloat2int => { cg_cast(cg, ref, n); },
|
||
|
||
.MemAlloca => { cg_mem(cg, ref, n); },
|
||
.MemGlobalAlloc => { cg_mem(cg, ref, n); },
|
||
.MemLoad => { cg_mem(cg, ref, n); },
|
||
.MemStore => { cg_mem(cg, ref, n); },
|
||
.MemOffset => { cg_mem(cg, ref, n); },
|
||
.MemFieldPtr => { cg_mem(cg, ref, n); },
|
||
|
||
.AggConstruct => { cg_agg(cg, ref, n); },
|
||
.AggExtract => { cg_agg(cg, ref, n); },
|
||
.AggInsert => { cg_agg(cg, ref, n); },
|
||
|
||
.TypeSizeof => { cg_typeop(cg, ref, n); },
|
||
.TypeBitsizeof => { cg_typeop(cg, ref, n); },
|
||
.TypeAlignof => { cg_typeop(cg, ref, n); },
|
||
.TypeOffsetof => { cg_typeop(cg, ref, n); },
|
||
.TypeFieldCount => { cg_typeop(cg, ref, n); },
|
||
|
||
.ControlParam => { cg_control(cg, ref, n); },
|
||
.ControlRet => { cg_control(cg, ref, n); },
|
||
.ControlBr => { cg_control(cg, ref, n); },
|
||
.ControlJmp => { cg_control(cg, ref, n); },
|
||
.ControlCall => { cg_control(cg, ref, n); },
|
||
.ControlUnreachable => { emit(cg, .Halt, .Void, 1); },
|
||
.ControlTrap => { emit(cg, .Halt, .Void, 1); },
|
||
|
||
.DbgPanic => {
|
||
var data = slot_data(&cg.frame, ref);
|
||
var msg = ByteView.empty();
|
||
match n.body { .Panic(p) => { msg = p.msg; }, _ => {} }
|
||
var msg_idx = Mcode.add_data(&ctx.prog, msg.ptr as usize, msg.len);
|
||
var fmt = ByteView.from_slice("%s");
|
||
var fmt_idx = Mcode.add_data(&ctx.prog, fmt.ptr as usize, 2);
|
||
if msg_idx <= 0 || fmt_idx <= 0 { ret; }
|
||
|
||
cg_gaddr(cg, fmt_idx);
|
||
cg_store_at(cg, data + 0, .Ptr);
|
||
cg_push(cg, .U64, 2);
|
||
cg_store_at(cg, data + 8, .U64);
|
||
|
||
cg_gaddr(cg, msg_idx);
|
||
cg_store_at(cg, data + 16, .Ptr);
|
||
cg_push(cg, .U64, msg.len);
|
||
cg_store_at(cg, data + 24, .U64);
|
||
|
||
cg_laddr(cg, data + 0);
|
||
cg_laddr(cg, data + 16);
|
||
|
||
var nat = Mcode.get_or_add_native(&ctx.prog, ByteView.from_slice("vm_printf"));
|
||
cg_push(cg, .U64, nat as usize);
|
||
emit(cg, .Ncall, .Void, 2);
|
||
emit(cg, .Drop, .Void, 0);
|
||
},
|
||
.DbgBreakpoint => { emit(cg, .Bk, .Void, 0); },
|
||
|
||
_ => {},
|
||
}
|
||
}
|
||
|
||
fn cmp_tid(n: *IrEntry): usize {
|
||
match n.body {
|
||
.Cmp(c) => { ret c.tid; },
|
||
_ => { ret 0; },
|
||
}
|
||
ret 0;
|
||
}
|
||
|
||
|
||
fn translate_function(ctx: *Ir2Vm, fid: usize, all_fixups: *Vec): usize {
|
||
var irf = IrM.func(ctx.ir, fid);
|
||
if irf == null { ret 0; }
|
||
|
||
var local_fixups = Vec.blank(@sizeof(Fix), @alignof(Fix));
|
||
var cg: Cgen = undefined;
|
||
cg.ctx = ctx;
|
||
cg.fid = fid;
|
||
cg.irf = irf;
|
||
cg.frame.slots = Vec.blank(@sizeof(Slot), @alignof(Slot));
|
||
cg.frame.args_bytes = 0;
|
||
cg.frame.frame_bytes = 0;
|
||
match Vec.with_capacity(@sizeof(usize), @alignof(usize), irf.nodes.len) {
|
||
.Ok(v) => { cg.node_ip = v; },
|
||
.Err(error) => { cg.node_ip = Vec.blank(@sizeof(usize), @alignof(usize)); },
|
||
}
|
||
cg.fixups = &local_fixups;
|
||
cg.terminated = false;
|
||
frame_build(&cg.frame, ctx, fid);
|
||
|
||
var func_ip = ip_of(&cg);
|
||
|
||
Mcode.add_func(&ctx.prog, irf.name, fn_nargs(ctx, irf.fn_tid), func_ip);
|
||
|
||
var local_slots = (cg.frame.frame_bytes - cg.frame.args_bytes + 7) / 8;
|
||
emit(&cg, .Alloc, .Void, local_slots);
|
||
|
||
var nnodes = irf.nodes.len;
|
||
var i: usize = 0;
|
||
while i < nnodes {
|
||
push_usize(&cg.node_ip, 0);
|
||
i = i + 1;
|
||
}
|
||
|
||
i = 1;
|
||
while i < nnodes {
|
||
(cg.node_ip.data as *usize)[i] = ip_of(&cg);
|
||
cg_node(&cg, i, fnode(irf, i));
|
||
i = i + 1;
|
||
}
|
||
|
||
i = 0;
|
||
while i < local_fixups.len {
|
||
var fx = (local_fixups.data as *Fix) + i;
|
||
match fx.kind {
|
||
.Jmp => {
|
||
var ins = ins_ptr(&ctx.prog, fx.ins_idx);
|
||
if ins != null {
|
||
var target_ip: usize = 0;
|
||
if fx.node_target < nnodes {
|
||
target_ip = usize_at(&cg.node_ip, fx.node_target);
|
||
}
|
||
ins.imm = target_ip - fx.ins_idx - 1;
|
||
}
|
||
},
|
||
.Fnaddr => { Vec.push(all_fixups, fx as *u8); },
|
||
}
|
||
i = i + 1;
|
||
}
|
||
|
||
Vec.drop(&cg.node_ip);
|
||
Vec.drop(&local_fixups);
|
||
frame_drop(&cg.frame);
|
||
ret func_ip;
|
||
}
|
||
|
||
|
||
// 就地初始化，避免返回含 Prog 的大聚合。
|
||
fn init(ctx: *Ir2Vm, ir: *Ir, ty: *TypeTable, layout: *Layout, attr: *Attr) {
|
||
ctx.ir = ir;
|
||
ctx.ty = ty;
|
||
ctx.attr = attr;
|
||
ctx.layout = layout;
|
||
ctx.extern_native = Vec.blank(@sizeof(isize), @alignof(isize));
|
||
ctx.global_gaddr = Vec.blank(@sizeof(usize), @alignof(usize));
|
||
|
||
match Mcode.new() {
|
||
.Ok(v) => { ctx.prog = v; },
|
||
.Err(error) => { @assert(false, "ir2vm: prog init failed"); },
|
||
}
|
||
}
|
||
|
||
fn drop(ctx: *Ir2Vm) {
|
||
Mcode.drop(&ctx.prog);
|
||
Vec.drop(&ctx.extern_native);
|
||
Vec.drop(&ctx.global_gaddr);
|
||
}
|
||
|
||
fn run_func(ctx: *Ir2Vm, ref: usize): i32 {
|
||
var all_fixups = Vec.blank(@sizeof(Fix), @alignof(Fix));
|
||
defer { Vec.drop(&all_fixups); }
|
||
translate_function(ctx, ref, &all_fixups);
|
||
ret 0;
|
||
}
|
||
|
||
fn run(ctx: *Ir2Vm): i32 {
|
||
var n = ctx.ir.funcs.len;
|
||
if n <= 1 { ret 0; }
|
||
|
||
// Pass 1：登记 extern 函数 -> native 索引。
|
||
var i: usize = 0;
|
||
while i < n {
|
||
var v: isize = -1;
|
||
Vec.push(&ctx.extern_native, &v as *u8);
|
||
i = i + 1;
|
||
}
|
||
i = 1;
|
||
while i < n {
|
||
var irf = IrM.func(ctx.ir, i);
|
||
if irf != null && fn_check_extern(ctx, irf) {
|
||
var nat = Mcode.get_or_add_native(&ctx.prog, irf.name);
|
||
extern_set(ctx, i, nat);
|
||
}
|
||
i = i + 1;
|
||
}
|
||
|
||
// 登记全局变量到 prog.gdata（Zero→零填/BSS，Bytes→拷贝），记下运行时下标。
|
||
var gi: usize = 0;
|
||
while gi < ctx.ir.globals.len {
|
||
var g = (ctx.ir.globals.data as *Global) + gi;
|
||
var gsize = ir_type_size(ctx, g.tid);
|
||
var didx: usize = 0;
|
||
if g.zero {
|
||
didx = Mcode.add_zero_data(&ctx.prog, gsize);
|
||
} else {
|
||
didx = Mcode.add_data(&ctx.prog, g.data.data as usize, gsize);
|
||
}
|
||
var dv = didx;
|
||
Vec.push(&ctx.global_gaddr, &dv as *u8);
|
||
gi = gi + 1;
|
||
}
|
||
|
||
// 哨兵：保证真实函数入口地址非零。
|
||
Mcode.add_instr(&ctx.prog, .Halt, .Void, 0);
|
||
|
||
// 预分配指令容量（按 IR 节点数粗略估计），减少逐条 append 的扩容/拷贝。
|
||
var est: usize = 16;
|
||
i = 1;
|
||
while i < n {
|
||
var irf = IrM.func(ctx.ir, i);
|
||
if irf != null { est = est + irf.nodes.len * 8 + 32; }
|
||
i = i + 1;
|
||
}
|
||
Vec.reserve(&ctx.prog.insns, est);
|
||
|
||
// Pass 2：翻译非 extern 函数。
|
||
var fid_ip = Vec.blank(@sizeof(usize), @alignof(usize));
|
||
i = 0;
|
||
while i < n {
|
||
push_usize(&fid_ip, 0);
|
||
i = i + 1;
|
||
}
|
||
var all_fixups = Vec.blank(@sizeof(Fix), @alignof(Fix));
|
||
defer { Vec.drop(&all_fixups); }
|
||
|
||
i = 1;
|
||
while i < n {
|
||
if extern_get(ctx, i) < 0 {
|
||
var ip = translate_function(ctx, i, &all_fixups);
|
||
(fid_ip.data as *usize)[i] = ip;
|
||
}
|
||
i = i + 1;
|
||
}
|
||
|
||
// FNADDR 回填。
|
||
i = 0;
|
||
while i < all_fixups.len {
|
||
match Vec.get(&all_fixups, i) {
|
||
.Ok(ptr) => {
|
||
var fx = ptr as *Fix;
|
||
if @enum2int(fx.kind) == @enum2int(FixKind.Fnaddr) {
|
||
var ins = ins_ptr(&ctx.prog, fx.ins_idx);
|
||
if ins != null {
|
||
var target: usize = 0;
|
||
if fx.fn_target > 0 && fx.fn_target < n {
|
||
target = usize_at(&fid_ip, fx.fn_target);
|
||
}
|
||
ins.imm = target;
|
||
}
|
||
}
|
||
},
|
||
.Err(error) => {},
|
||
}
|
||
i = i + 1;
|
||
}
|
||
|
||
// 每个函数的 ninsns = 下一个入口 - 本入口。
|
||
i = 0;
|
||
while i < ctx.prog.funcs.len {
|
||
var f = func_ptr(&ctx.prog, i);
|
||
if f != null {
|
||
var next = ctx.prog.insns.len;
|
||
if i + 1 < ctx.prog.funcs.len {
|
||
var nf = func_ptr(&ctx.prog, i + 1);
|
||
if nf != null { next = nf.address; }
|
||
}
|
||
f.ninsns = next - f.address;
|
||
}
|
||
i = i + 1;
|
||
}
|
||
|
||
Vec.drop(&fid_ip);
|
||
ret 0;
|
||
}
|
||
|
||
fn dump(ctx: *Ir2Vm, out: *ByteBuffer): bool {
|
||
ret Mcode.dump(&ctx.prog, out);
|
||
}
|
||
|
||
// 序列化到内存 ByteBuffer（不落盘），供内嵌 VM 直接加载。
|
||
fn encode(ctx: *Ir2Vm, out: *ByteBuffer): bool {
|
||
match Mcode.encode(&ctx.prog, out) {
|
||
.Ok => { ret true; },
|
||
.Err(error) => { ret false; },
|
||
}
|
||
ret false;
|
||
}
|
||
|
||
// 把翻译结果写成 .sir（二进制）。
|
||
fn store(ctx: *Ir2Vm, path: ByteView): bool {
|
||
match Mcode.store(&ctx.prog, path) {
|
||
.Ok => { ret true; },
|
||
.Err(error) => { ret false; },
|
||
}
|
||
ret false;
|
||
}
|
||
|
||
|
||
|
||
|
||
fn main() {
|
||
var ir = IrM.new();
|
||
defer { IrM.drop(&ir); }
|
||
|
||
var tt: TypeTable = undefined;
|
||
match TypeTable.new() {
|
||
.Ok(v) => { tt = v; },
|
||
.Err(error) => { @assert(false, "tt init"); ret; },
|
||
}
|
||
defer { TypeTable.drop(&tt); }
|
||
|
||
var layout: Layout = undefined;
|
||
match LayoutM.new() {
|
||
.Ok(v) => { layout = v; },
|
||
.Err(error) => { @assert(false, "layout init"); ret; },
|
||
}
|
||
defer { LayoutM.drop(&layout); }
|
||
|
||
var attr: Attr = undefined;
|
||
match AttrM.new() {
|
||
.Ok(v) => { attr = v; },
|
||
.Err(error) => { @assert(false, "attr init"); ret; },
|
||
}
|
||
defer { AttrM.drop(&attr); }
|
||
|
||
var ctx: Ir2Vm = undefined;
|
||
init(&ctx, &ir, &tt, &layout, &attr);
|
||
defer { drop(&ctx); }
|
||
var rc = run(&ctx);
|
||
@assert(rc == 0, "run empty ir");
|
||
// 只有哨兵函数：无指令。
|
||
@assert(ctx.prog.insns.len == 0, "empty ir yields no insns");
|
||
}
|