zzy
cec96333e7
- 新增 scc_ast2ir_promote.c 实现整数提升(6.3.1.1)和寻常算术转换(6.3.1.8) - 重构 HIR Builder: bblock → create_bblock + append_bblock，引入BBList链表管理 - AST2IR 全面集成类型提升：二元运算、赋值、函数调用参数、自增/自减操作符 - 变参函数支持：跳过 ... 假参数，实现默认参数提升(float→double等) - 简化 HIR Dump 实现 - MIR: Win64 ABI改进、x86指令选择优化 - 新增 printf 测试用例
115 lines
4.2 KiB
C
115 lines
4.2 KiB
C
#ifndef __SCC_X86_MIR_H__
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#define __SCC_X86_MIR_H__
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#include "../scc_mir.h"
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#include <scc_cfg.h>
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#include <scc_pos.h>
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#include <x86/scc_x86_encode.h>
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#include <x86/scc_x86_iform.h>
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#include <x86/scc_x86_reg.h>
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typedef struct {
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scc_x86_iform_t opcode; // must be int or enum
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int num_operands;
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scc_x86_operand_value_t operands[3];
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scc_pos_t src_loc;
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} scc_x86_instr_t;
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typedef union scc_mir_x86_instr {
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scc_mir_instr_t instr;
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scc_x86_instr_t x86_instr;
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} scc_mir_x86_instr_t;
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typedef SCC_VEC(scc_mir_x86_instr_t) scc_mir_x86_instr_vec_t;
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#define SCC_MIR_X86_BBLOCK_INSTRS(bb) ((scc_mir_x86_instr_vec_t *)&bb->values)
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#define SCC_MIR_X86_BBLOCK_INSTRS_C(bb) \
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((const scc_mir_x86_instr_vec_t *)&bb->values)
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static inline cbool scc_x86_reg_is_vreg(scc_x86_reg_t reg) {
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return reg >= SCC_X86_REG_COUNT;
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}
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static inline cbool scc_x86_op_is_vreg(const scc_x86_operand_value_t *op) {
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return op->kind == SCC_X86_OPR_REG && scc_x86_reg_is_vreg(op->reg);
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}
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static inline int scc_x86_reg_get_vreg(scc_x86_reg_t reg) {
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return (int)reg - (int)SCC_X86_REG_COUNT;
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}
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static inline int scc_x86_op_get_vreg(const scc_x86_operand_value_t *op) {
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return scc_x86_reg_get_vreg(op->reg);
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}
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static inline void scc_x86_op_set_preg(scc_x86_operand_value_t *op,
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scc_x86_reg_t preg) {
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op->kind = SCC_X86_OPR_REG;
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op->reg = preg;
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}
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// slot_id 编码为 base=INVALID, disp=slot_id
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static inline scc_x86_operand_value_t scc_x86_op_slot(int slot_id, u8 size) {
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scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_MEM};
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o.mem.base = SCC_X86_REG_INVALID;
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o.mem.index = SCC_X86_REG_INVALID;
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o.mem.scale = 1;
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o.mem.disp.displacement = slot_id;
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o.mem.disp.displacement_bits = 0;
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o.size = size;
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return o;
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}
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static inline bool scc_x86_op_is_slot(const scc_x86_operand_value_t *op) {
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return op->kind == SCC_X86_OPR_MEM && op->mem.base == SCC_X86_REG_INVALID;
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}
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static inline int scc_x86_op_slot_id(const scc_x86_operand_value_t *op) {
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return op->mem.disp.displacement;
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}
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static inline void scc_mir_x86_instr_0(scc_mir_x86_instr_t *out,
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scc_x86_iform_t opcode, scc_pos_t pos) {
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out->x86_instr.opcode = opcode;
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out->x86_instr.num_operands = 0;
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out->x86_instr.src_loc = pos;
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}
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static inline void scc_mir_x86_instr_1(scc_mir_x86_instr_t *out,
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scc_x86_iform_t opcode,
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scc_x86_operand_value_t op0,
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scc_pos_t pos) {
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out->x86_instr.opcode = opcode;
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out->x86_instr.num_operands = 1;
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out->x86_instr.operands[0] = op0;
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out->x86_instr.src_loc = pos;
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}
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static inline void scc_mir_x86_instr_2(scc_mir_x86_instr_t *out,
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scc_x86_iform_t opcode,
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scc_x86_operand_value_t op0,
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scc_x86_operand_value_t op1,
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scc_pos_t pos) {
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out->x86_instr.opcode = opcode;
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out->x86_instr.num_operands = 2;
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out->x86_instr.operands[0] = op0;
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out->x86_instr.operands[1] = op1;
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out->x86_instr.src_loc = pos;
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}
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static inline void
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scc_mir_x86_instr_3(scc_mir_x86_instr_t *out, scc_x86_iform_t opcode,
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scc_x86_operand_value_t op0, scc_x86_operand_value_t op1,
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scc_x86_operand_value_t op2, scc_pos_t pos) {
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out->x86_instr.opcode = opcode;
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out->x86_instr.num_operands = 3;
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out->x86_instr.operands[0] = op0;
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out->x86_instr.operands[1] = op1;
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out->x86_instr.operands[2] = op2;
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out->x86_instr.src_loc = pos;
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}
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void scc_x86_emit_move_to_vec(scc_mir_x86_instr_vec_t *vec,
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scc_x86_operand_value_t dst,
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scc_x86_operand_value_t src);
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void scc_x86_emit_load_to_vec(scc_mir_x86_instr_vec_t *vec,
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scc_x86_operand_value_t dst,
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scc_x86_operand_value_t src_addr);
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void scc_x86_emit_store_to_vec(scc_mir_x86_instr_vec_t *vec,
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scc_x86_operand_value_t dst_addr,
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scc_x86_operand_value_t src);
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#endif /* __SCC_X86_MIR_H__ */
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