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feat(mir): 添加x86架构相关头文件并重构MIR指令表示

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- 创建scc_x86_mir.h头文件，定义x86后端MIR指令结构和操作数构造器
- 创建scc_x86_isel.h头文件，定义x86_64指令选择器和相关工具函数
- 创建scc_x86_reg_alloc.h头文件，定义x86寄存器分配架构特定接口
- 移除旧的x86_64_isel.h和x86_64_reg_alloc.h文件
- 重构scc_mir.h中的指令表示，使用联合体存储伪指令数据
- 更新ABI lowering回调参数，使用void指针保持类型无关
- 扩展寄存器分配操作接口，添加指令信息查询和伪指令处理功能
- 更新目标文件包含路径以使用新的头文件命名
This commit is contained in:
zzy
2026-05-20 11:07:05 +08:00
parent 2c13ac54df
commit c6e3bb2e20
22 changed files with 792 additions and 788 deletions
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61
libs/ir/mir/include/arch/scc_x86_isel.h Normal file
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#ifndef __SCC_X86_ISEL_H__
#define __SCC_X86_ISEL_H__
#include <scc_lir_module.h>
#include <scc_tree_dump.h>
#include "../core_pass/scc_abi_lowering.h"
#include "scc_x86_mir.h"
typedef struct scc_x86_64_isel {
scc_mir_x86_instr_vec_t instrs;
scc_mir_func_t *func;
scc_pos_t pos;
scc_abi_lowering_t abi_lowering;
} scc_x86_64_isel_t;
void scc_isel_x86_64(scc_mir_module_t *mir_module,
const scc_lir_module_t *lir_module,
scc_x86_64_isel_t *isel);
// Utils
void scc_x86_emit_move(scc_x86_64_isel_t *isel, scc_x86_operand_value_t dst,
scc_x86_operand_value_t src, u8 size);
scc_x86_operand_value_t scc_x86_lir_val_to_mir_op(scc_x86_64_isel_t *isel,
const scc_lir_val_t *val);
static inline void emit_direct_call(scc_x86_64_isel_t *isel,
const char *callee) {
(void)callee;
scc_mir_x86_instr_t instr = {0};
scc_mir_x86_instr_1(&instr, SCC_X86_IFORM_CALL_NEAR_GPRV,
scc_x86_op_relbr(0), scc_pos_create());
scc_vec_push(isel->instrs, instr);
}
static inline void emit_ret(scc_x86_64_isel_t *isel) {
scc_mir_x86_instr_t instr = {0};
scc_mir_x86_instr_0(&instr, SCC_X86_IFORM_RET_NEAR, scc_pos_create());
scc_vec_push(isel->instrs, instr);
}
#define add_instr_0(isel, iform) \
do { \
scc_mir_x86_instr_t instr; \
scc_mir_x86_instr_0(&instr, (iform), (isel)->pos); \
scc_vec_push((isel)->instrs, instr); \
} while (0)
#define add_instr_1(isel, iform, arg1) \
do { \
scc_mir_x86_instr_t instr; \
scc_mir_x86_instr_1(&instr, (iform), (arg1), (isel)->pos); \
scc_vec_push((isel)->instrs, instr); \
} while (0)
#define add_instr_2(isel, iform, arg1, arg2) \
do { \
scc_mir_x86_instr_t instr; \
scc_mir_x86_instr_2(&instr, (iform), (arg1), (arg2), (isel)->pos); \
scc_vec_push((isel)->instrs, instr); \
} while (0)
#endif /* __SCC_X86_ISEL_H__ */

134
libs/ir/mir/include/arch/scc_x86_mir.h Normal file
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#ifndef __SCC_X86_MIR_H__
#define __SCC_X86_MIR_H__
#include "../scc_mir.h"
#include <scc_cfg.h>
#include <scc_pos.h>
#include <x86/scc_x86_encode.h>
#include <x86/scc_x86_iform.h>
#include <x86/scc_x86_reg.h>
typedef struct {
int opcode;
uint8_t num_operands;
scc_x86_operand_value_t operands[6];
scc_pos_t src_loc;
} scc_x86_instr_t;
// x86 后端指令：首字段 int opcode（正 = scc_x86_iform_t，负 = 伪指令）
typedef union scc_mir_x86_instr {
scc_mir_instr_t instr;
scc_x86_instr_t x86_instr;
} scc_mir_x86_instr_t;
typedef SCC_VEC(scc_mir_x86_instr_t) scc_mir_x86_instr_vec_t;
// ── 基本块 values 强制转换 ──────────────────────────────────────────────
#define SCC_MIR_X86_BBLOCK_INSTRS(bb) ((scc_mir_x86_instr_vec_t *)&bb->values)
#define SCC_MIR_X86_BBLOCK_INSTRS_C(bb) \
((const scc_mir_x86_instr_vec_t *)&bb->values)
// ── vreg 编码 ──────────────────────────────────────────────────────────
static inline bool scc_x86_op_is_vreg(const scc_x86_operand_value_t *op) {
return op->kind == SCC_X86_OPR_REG &&
(int)op->reg >= (int)SCC_X86_REG_COUNT;
}
static inline int scc_x86_op_get_vreg(const scc_x86_operand_value_t *op) {
return (int)op->reg - (int)SCC_X86_REG_COUNT;
}
static inline void scc_x86_op_set_preg(scc_x86_operand_value_t *op,
scc_x86_reg_t preg) {
op->kind = SCC_X86_OPR_REG;
op->reg = preg;
}
// ── 未解析栈槽编码 (base=INVALID, disp=slot_id) ──────────────────────
static inline bool scc_x86_op_is_slot(const scc_x86_operand_value_t *op) {
return op->kind == SCC_X86_OPR_MEM && op->mem.base == SCC_X86_REG_INVALID;
}
static inline int scc_x86_op_slot_id(const scc_x86_operand_value_t *op) {
return op->mem.disp;
}
// ── 指令构建辅助 ──────────────────────────────────────────────────────
static inline void scc_mir_x86_instr_0(scc_mir_x86_instr_t *out, int opcode,
scc_pos_t pos) {
out->x86_instr.opcode = opcode;
out->x86_instr.num_operands = 0;
out->x86_instr.src_loc = pos;
}
static inline void scc_mir_x86_instr_1(scc_mir_x86_instr_t *out, int opcode,
scc_x86_operand_value_t op0,
scc_pos_t pos) {
out->x86_instr.opcode = opcode;
out->x86_instr.num_operands = 1;
out->x86_instr.operands[0] = op0;
out->x86_instr.src_loc = pos;
}
static inline void scc_mir_x86_instr_2(scc_mir_x86_instr_t *out, int opcode,
scc_x86_operand_value_t op0,
scc_x86_operand_value_t op1,
scc_pos_t pos) {
out->x86_instr.opcode = opcode;
out->x86_instr.num_operands = 2;
out->x86_instr.operands[0] = op0;
out->x86_instr.operands[1] = op1;
out->x86_instr.src_loc = pos;
}
static inline void scc_mir_x86_instr_3(scc_mir_x86_instr_t *out, int opcode,
scc_x86_operand_value_t op0,
scc_x86_operand_value_t op1,
scc_x86_operand_value_t op2,
scc_pos_t pos) {
out->x86_instr.opcode = opcode;
out->x86_instr.num_operands = 3;
out->x86_instr.operands[0] = op0;
out->x86_instr.operands[1] = op1;
out->x86_instr.operands[2] = op2;
out->x86_instr.src_loc = pos;
}
// ── 常用操作数构造器 ──────────────────────────────────────────────────
static inline scc_x86_operand_value_t scc_x86_op_preg(scc_x86_reg_t reg) {
scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_REG, .reg = reg};
return o;
}
static inline scc_x86_operand_value_t scc_x86_op_vreg(int vreg) {
scc_x86_operand_value_t o = {
.kind = SCC_X86_OPR_REG,
.reg = (scc_x86_reg_t)((int)SCC_X86_REG_COUNT + vreg)};
return o;
}
static inline scc_x86_operand_value_t scc_x86_op_relbr(i32 rel) {
scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_RELBR, .imm = rel};
return o;
}
static inline scc_x86_operand_value_t scc_x86_op_imm(i64 imm) {
scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_IMM, .imm = imm};
return o;
}
// slot_id 编码为 base=INVALID, disp=slot_id
static inline scc_x86_operand_value_t scc_x86_op_slot(int slot_id) {
scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_MEM};
o.mem.base = SCC_X86_REG_INVALID;
o.mem.index = SCC_X86_REG_INVALID;
o.mem.scale = 1;
o.mem.disp = slot_id;
return o;
}
static inline scc_x86_operand_value_t scc_x86_op_symbol(const char *sym) {
scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_IMM,
.imm = (i64)(usize)sym};
(void)o;
// symbol 暂用一个近似值占位，编码阶段处理重定位
return o;
}
static inline scc_x86_operand_value_t
scc_x86_op_block(scc_cfg_bblock_id_t bid) {
scc_x86_operand_value_t o = {.kind = SCC_X86_OPR_RELBR, .imm = 0};
(void)bid;
return o;
}
#endif /* __SCC_X86_MIR_H__ */

8
libs/ir/mir/include/arch/scc_x86_reg_alloc.h Normal file
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#ifndef __SCC_X86_REG_ALLOC_H__
#define __SCC_X86_REG_ALLOC_H__
#include "../core_pass/scc_reg_alloc.h"
void scc_reg_alloc_fill_arch_x86(scc_reg_alloc_op_t *ops);
#endif /* __SCC_X86_REG_ALLOC_H__ */

66
libs/ir/mir/include/arch/x86_64_isel.h
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#ifndef __SCC_X86_64_ISEL_H__
#define __SCC_X86_64_ISEL_H__
#include <scc_lir_module.h>
#include <scc_tree_dump.h>
#include <x86/scc_x86_iform.h>
#include <x86/scc_x86_reg.h>
#include "../core_pass/scc_abi_lowering.h"
#include "../scc_mir_module.h"
typedef struct scc_x86_64_isel {
scc_mir_instr_vec_t instrs;
scc_mir_func_t *func;
scc_abi_lowering_t abi_lowering;
} scc_x86_64_isel_t;
void scc_isel_x86_64(scc_mir_module_t *mir_module,
const scc_lir_module_t *lir_module,
scc_x86_64_isel_t *isel);
static void add_instr(scc_x86_64_isel_t *isel, const scc_mir_instr_t *instr) {
scc_vec_push(isel->instrs, *instr);
}
static inline void add_instr_0(scc_x86_64_isel_t *isel,
scc_x86_iform_t opcode) {
scc_mir_instr_t out = {.opcode = opcode, .num_operands = 0};
add_instr(isel, &out);
}
static inline void add_instr_1(scc_x86_64_isel_t *isel, scc_x86_iform_t opcode,
scc_mir_operand_t op1) {
scc_mir_instr_t out = {.opcode = opcode, .num_operands = 1};
out.operands[0] = op1;
add_instr(isel, &out);
}
static inline void add_instr_2(scc_x86_64_isel_t *isel, scc_x86_iform_t opcode,
scc_mir_operand_t op1, scc_mir_operand_t op2) {
scc_mir_instr_t out = {.opcode = opcode, .num_operands = 2};
out.operands[0] = op1;
out.operands[1] = op2;
add_instr(isel, &out);
}
static inline scc_mir_operand_t reg_operand(scc_x86_reg_t reg) {
return (scc_mir_operand_t){.kind = SCC_MIR_OP_PREG, .preg = reg};
}
// Utils
void scc_x86_emit_move(scc_x86_64_isel_t *isel, scc_mir_operand_t dst,
scc_mir_operand_t src, u8 size);
scc_mir_operand_t scc_x86_lir_val_to_mir_op(scc_x86_64_isel_t *isel,
const scc_lir_val_t *val);
static inline void emit_call(scc_x86_64_isel_t *isel, const char *callee) {
scc_mir_operand_t sym = {.kind = SCC_MIR_OP_SYMBOL, .symbol = callee};
add_instr_1(isel, SCC_X86_IFORM_CALL_NEAR_GPRV, sym);
}
static inline void emit_ret(scc_x86_64_isel_t *isel) {
add_instr_0(isel, SCC_X86_IFORM_RET_NEAR);
}
#endif /* __SCC_X86_64_ISEL_H__ */

8
libs/ir/mir/include/arch/x86_64_reg_alloc.h
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#ifndef __SCC_X86_64_REG_ALLOC_H__
#define __SCC_X86_64_REG_ALLOC_H__
#include "../core_pass/scc_reg_alloc.h"
void scc_reg_alloc_fill_arch_x86(scc_reg_alloc_op_t *ops);
#endif /* __SCC_X86_64_REG_ALLOC_H__ */