diff --git a/nanos-lite/include/common.h b/nanos-lite/include/common.h
index a5abb87..a765d24 100644
--- a/nanos-lite/include/common.h
+++ b/nanos-lite/include/common.h
@@ -2,7 +2,7 @@
 #define __COMMON_H__
 
 /* Uncomment these macros to enable corresponding functionality. */
-//#define HAS_CTE
+#define HAS_CTE
 //#define HAS_VME
 //#define MULTIPROGRAM
 //#define TIME_SHARING
diff --git a/nanos-lite/src/irq.c b/nanos-lite/src/irq.c
index 624a0ac..a81284b 100644
--- a/nanos-lite/src/irq.c
+++ b/nanos-lite/src/irq.c
@@ -2,6 +2,7 @@
 
 static Context* do_event(Event e, Context* c) {
   switch (e.event) {
+    case EVENT_YIELD: printf("EVENT_YIELD\n"); break;
     default: panic("Unhandled event ID = %d", e.event);
   }
 
diff --git a/nemu/src/cpu/Kconfig b/nemu/src/cpu/Kconfig
index 8e370dd..6fa1a5a 100644
--- a/nemu/src/cpu/Kconfig
+++ b/nemu/src/cpu/Kconfig
@@ -24,7 +24,7 @@ if ITRACE
 config ITRACE_COND
   depends on ITRACE
   string "Only trace instructions when the condition is true"
-  default "true"
+  default "dnpc != 0"
 endif # ITRACE
 
 menuconfig IRINGBUF
@@ -109,4 +109,9 @@ config DTRACE_READ
 
 endif # DTRACE
 
+menuconfig ETRACE
+  depends on TRACE
+  bool "Enable exception tracer"
+  default n
+
 endmenu
diff --git a/nemu/src/isa/riscv32/system/intr.c b/nemu/src/isa/riscv32/system/intr.c
index 05bc3b6..f1c3da8 100644
--- a/nemu/src/isa/riscv32/system/intr.c
+++ b/nemu/src/isa/riscv32/system/intr.c
@@ -21,6 +21,9 @@ word_t isa_raise_intr(word_t NO, vaddr_t epc) {
   /* TODO: Trigger an interrupt/exception with ``NO''.
    * Then return the address of the interrupt/exception vector.
    */
+#ifdef CONFIG_ETRACE
+  log_write("raise intr %d\n", NO);
+#endif
   C(MEPC) = epc;
   C(MCAUSE) = NO;
   C(MSTATUS) = 0x1800;